Class 11 Basic Electronics Engineering — Exercise Solutions
Key Concepts Quick Recap
| Component | Symbol | Key Property |
|---|
| Diode | → (anode to cathode) | One-way current (forward bias); blocks reverse |
| Zener diode | Special diode | Conducts in reverse at breakdown voltage (voltage regulator) |
| NPN transistor | 3 terminals: E, B, C | IC = β × IB; CE config: highest current gain |
| AND gate | A·B | Output HIGH only if ALL inputs HIGH |
| OR gate | A+B | Output HIGH if ANY input is HIGH |
| NOT gate | Ā | Output is inverse of input |
| NAND gate | (A·B)' | Universal gate; inverse of AND |
| NOR gate | (A+B)' | Universal gate; inverse of OR |
I. Choose the Best Answer (MCQs)
1. A p-n junction diode conducts current in: (a) Both directions (b) Reverse bias only (c) Forward bias only (d) Neither direction
Answer(c) Forward bias only Forward bias: P-type connected to + terminal, N-type to − terminal → depletion region narrows → current flows when forward voltage exceeds threshold (Si: ~0.7V, Ge: ~0.3V). Reverse bias: P to − and N to + → depletion region widens → no current (except tiny leakage). Applications: rectifiers (AC to DC), signal clipping.
2. The transistor configuration with highest current gain is: (a) Common Base (CB) (b) Common Emitter (CE) (c) Common Collector (CC) (d) All have equal gain
Answer(b) Common Emitter (CE) CE configuration: most commonly used; highest current gain (β = IC/IB, typically 20-500). Voltage gain and power gain also high; 180° phase inversion. CB: unity current gain (<1), highest voltage gain; used in RF amplifiers. CC (emitter follower): unity voltage gain, high current gain; used for impedance matching.
3. The output of an AND gate is HIGH when: (a) At least one input is HIGH (b) All inputs are HIGH (c) All inputs are LOW (d) Input A is HIGH and B is LOW
Answer(b) All inputs are HIGH AND gate (A·B): output = 1 only when both A = 1 AND B = 1. Truth table: 00→0, 01→0, 10→0, 11→1. Equivalent to multiplication (1×1=1; 1×0=0). OR gate: output = 1 if at least one input is 1.
4. Which gate is called the universal gate? (a) AND (b) OR (c) NOT (d) NAND (and NOR)
Answer(d) NAND (and NOR) Universal gate: can be used to build any other logic gate (AND, OR, NOT, XOR). NAND and NOR are both universal gates. NAND built from: NOT → connect NAND output back = NOT gate; AND = NAND followed by NOT; OR = NAND with inverted inputs. NAND gates are cheaper to manufacture (CMOS technology).
5. A half-wave rectifier converts: (a) AC to DC using both halves of AC waveform (b) AC to DC using only one half (positive or negative) of the AC waveform (c) DC to AC (d) DC to DC (voltage conversion)
Answer(b) AC to DC using only one half (positive or negative) of the AC waveform Half-wave rectifier: 1 diode; conducts only during positive half-cycle; output is pulsating DC with many ripples; efficiency ~40.6%. Full-wave rectifier: 2 diodes (centre-tap) or 4 diodes (bridge); uses both halves; smoother output; efficiency ~81.2%; preferred for most power supply applications.
6. Doping in semiconductors means: (a) Adding chemical coatings (b) Intentionally adding controlled impurities to change conductivity (c) Purifying the semiconductor material (d) Heating the material
Answer(b) Intentionally adding controlled impurities to change conductivity Doping: adds impurity atoms to intrinsic semiconductor (pure Si/Ge). N-type: add pentavalent atoms (As, Sb, P) → extra electrons → electrons are majority carriers. P-type: add trivalent atoms (B, Al, Ga, In) → holes (electron vacancies) → holes are majority carriers. Doping controls resistivity precisely.
7. The output of a NOT gate when input is 0 is: (a) 0 (b) 1 (c) Undefined (d) 2
Answer(b) 1 NOT gate (inverter): output = complement of input. Truth table: Input 0 → Output 1; Input 1 → Output 0. Represented as Ā (A-bar). Implemented by single transistor in saturation/cut-off. Forms basis of all logic design.
II. Short Answer Questions
Q1. Explain the working of a p-n junction diode with a diagram description.
Answer
A p-n junction diode is formed when P-type semiconductor (holes majority) and N-type semiconductor (electrons majority) are joined.
At equilibrium (no external voltage):
- Electrons diffuse from N to P; holes diffuse from P to N.
- Creates depletion region (no free charge carriers) at junction.
- Built-in potential barrier ~0.7V (Si).
Forward bias (V+ to P, V− to N):
- External voltage opposes built-in barrier.
- When forward voltage > 0.7V (Si): depletion region collapses → current flows (exponential increase).
- Dynamic resistance is very low.
Reverse bias (V− to P, V+ to N):
- External voltage adds to built-in barrier.
- Depletion region widens.
- Only tiny reverse saturation current (leakage) flows.
- At reverse breakdown voltage: avalanche or Zener breakdown occurs.
Applications: rectifier, clipper, clamper, signal detector, Zener voltage regulator, LED, photodiode, solar cell.
Q2. What are logic gates? Explain with truth tables for AND, OR, and NOT.
Answer
Logic gates: basic electronic circuits that perform Boolean operations. Inputs and outputs are binary (0 = LOW = 0V; 1 = HIGH = +5V or +3.3V).
AND Gate (A · B):
Output is 1 only when BOTH inputs are 1.
| A | B | Output (A·B) |
|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
OR Gate (A + B):
Output is 1 when at LEAST ONE input is 1.
| A | B | Output (A+B) |
|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
NOT Gate (Ā):
Output is the INVERSE of input.
Exam Checklist
- Si diode: forward voltage threshold ~0.7V; Ge: ~0.3V.
- Forward bias: depletion region collapses; current flows.
- CE configuration: highest current gain (β = IC/IB).
- AND: all inputs HIGH → output HIGH. OR: any input HIGH → output HIGH. NOT: inverts.
- NAND and NOR: universal gates (can make any other gate).
- Half-wave rectifier: 1 diode; uses half cycle; 40.6% efficiency.
- Full-wave bridge: 4 diodes; uses full cycle; 81.2% efficiency.
- N-type doping: pentavalent (5-valent: P, As, Sb). P-type: trivalent (3-valent: B, Al).
